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Quantum algorithms are becoming important because of their accelerated processing speed over classical algorithms for solving complex problems1,2,3,4,5. However, using quantum algorithms to solve practical problems is difficult because quantum states are very susceptible to noise, which can cause critical errors in the execution of quantum algorithms. In other words, quantum errors caused by noise pose a major obstacle to the realization of quantum algorithms.

The quantum circuit model is a well-known model for quantum computation. In this model, quantum algorithms are represented by quantum circuits composed of qubits and gates. Since noise arises from the evolution of quantum states, gate operations are the major cause of noise. Therefore, quantum circuits should be designed with a minimal number of gates, especially in the noisy intermediate-scale quantum (NISQ) arena6,7.

Within the realm of quantum logic synthesis, quantum circuits are broken down into gates derived from a universal gate library. The basic gate library consists of CNOT and single-qubit gates8,9. Since CNOT gates are considered the main generators of quantum errors and have a longer execution time compared to single-qubit gates10, CNOT gates are expected to dominate the cost of quantum circuits when using the basic gate library.

When considering the cost of a quantum circuit, connectivity between qubits should also be taken into account. This is because physical limitations in quantum hardware may enforce quantum circuits to adopt the nearest-neighbor (NN) architecture10,11. The NN architecture means that a qubit in the circuit only interacts with adjacent qubits.

The quantum Fourier transform (QFT) is an essential tool for many quantum algorithms, such as quantum addition12, quantum phase estimation (QPE)13, quantum amplitude estimation (QAE)3, the algorithm for solving linear systems of equations4, and Shors factoring algorithm1, to name a few. Therefore, the cost optimization of QFT would result in the efficiency improvement of these quantum algorithms.

There have been studies aimed at reducing circuit costs of QFT8,14,15,16,17,18,19,20,21,22. Among them are studies related to the number of CNOT gates in QFT, including the following:

When constructing an (n)-qubit QFT circuit using the basic gate library, (n(n-1)) CNOT gates are required, provided that qubit reordering is allowed8. Qubit reordering implies that the sequence of qubits can be altered before and after the execution of the circuit.

In Ref.14, the authors incorporated (n(n-1)/2) extra SWAP gates to develop an (n)-qubit linear nearest-neighbor (LNN) QFT circuit, which accommodates qubit reordering.

To synthesize a single SWAP gate using the basic gate library, three CNOT gates are required8.

Consequently, the total number of CNOT gates required for the (n)-qubit LNN QFT circuit presented in Ref.14 is (5n(n-1)/2).

By employing SWAP gates in the construction of LNN QFT circuits, the primary term representing the quantity of CNOT gates increases by a factor of 2.5.

Previous research efforts, as documented in case studies, have investigated techniques to minimize the amount of SWAP gates required in the LNN architecture when assembling (n)-qubit LNN QFT circuits15,16,17,18. These studies aimed to optimize the circuit design and improve overall efficiency.

In this paper, we propose a new n-qubit LNN QFT circuit design that directly utilizes CNOT gates, unlike previous studies14,15,16,17,18 that utilized SWAP gates. Our approach offers a significant advantage by synthesizing a more compact QFT circuit using CNOT gates instead of SWAP gates, as the implementation of each SWAP gate requires three CNOT gates. Upon qubit reordering, our (n)-qubit LNN QFT circuit requires ({n}^{2}+n-4) CNOT gates, which are 40% of those in Ref.14 asymptotically. Furthermore, we demonstrate that our circuit design significantly reduces the number of CNOT gates compared to the best-known results for 5- to 10-qubit LNN QFT circuits17,18.

In the following analysis, we compare our QFT circuit with the conventional QFT circuit8 when used as inputs for the Qiskit transpiler23, which is required for implementation on IBM quantum computers that necessitate NN architecture10. Our findings confirm that using our QFT circuit as input requires fewer CNOT gates in comparison to the conventional QFT circuits. This evidence indicates that our QFT circuit design could serve as a foundation for synthesizing QFT circuits that are compatible with NN architecture, potentially leading to more efficient implementations.

Furthermore, we present experimental results from implementing the QPE using 3-qubit QFTs on actual quantum hardware, specifically the IBM_Nairobi10 and Rigetti Aspen-1111 systems. We also illustrate the decomposition of controlled-({R}_{y}) gates that share a target qubit using our proposed method. This particular circuit is often found in QAE, which is anticipated to supplant classical Monte Carlo integration methods24,25. By providing these results, we aim to highlight the practicality and effectiveness of our approach in real-world quantum computing applications.

The remainder of this paper is organized as follows: in the Background section, we provide a brief overview of quantum circuits, QFT, QPE, and QAE. The proposed approach section outlines our method for constructing LNN QFT circuits. In the resultsand discussion section, we present the outcomes of transpilation on IBM quantum computers, display the experimental results of QPE executions on quantum hardware, and illustrate how to convert a circuit of controlled-({R}_{y}) gates sharing the target qubit into an LNN circuit using our proposed method. We also address the limitations of our study and suggest potential future research directions. Finally, we conclude the paper with a summary of our findings and their implications for the field of quantum computing.

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Reducing CNOT count in quantum Fourier transform for the linear ... - Nature.com